-*- Mode: Text; Fonts: (Cptfont hl12b hl12bi) -*- --------------------------------------------------------------------------------- 2Explorer MP Multiprocessor System * 10 NOV 87 Mark Grieger --------------------------------------------------------------------------------- 2Introduction* 11.1 Description* The Explorer MP is multiprocessor version of the Explorer LX that uses 21 physical slots (16 NuBus slots) for configuring multiple Lisp processors on a single NuBus back- plane. A blank physical slot is inserted before each processor slot to allow for the extra width of Explorer-I CPU boards. The 21-Slot chassis typically holds a maximum of four Explorer (I or II) processors. 11.2 Hardware * The hardware configuration for the 21-slot chassis resembles the standard Explorer LX configuration; the major exceptions are outlined below: * The chassis is contained in an entirely different form factor to enclose the extra slots, larger cooling fan, and a high- current power supply. * An independent NuBus clock is provided; the NuBus clock on each SIB is disabled. * Several boards are moved from their standard LX positions to take advantage of the extra slot space. * The 21-slot chassis backplane does not provide a local bus; jumper cards are added to the rear of the backplane to provide independent local buses for Lisp CPU/memory pairs. 11.3 Software * The following software is required for the Explorer LX 21-slot chassis: * Explorer system code (release 3.0 or later) * TI System V code (release 2.1.2 or later) * Explorer LX microcode: Explorer I processors: EXP1-UCODE-MP 12 or later. Explorer II processors: EXP2-UCODE 25 or later. * Explorer LX system code (release 2.0 or greater). 2Installation* 12.1 Installation Requirements* The Explorer LX 21-slot chassis imposes greater restrictions on disk and hardware configuration than the standard Explorer LX. Later revisions of some boards are necessary for proper booting. Individual page and file bands must be made available for use by each Lisp processor; this allocation must be explicitly defined in the configuration partition. Each Ethernet board (if included) can be assigned to only one Lisp processor in the chassis. 12.1.1 Revision Levels* All hardware to be installed in the 21-slot chassis must comply with the revision levels specified in the 2Explorer LX System Installation* guide (2537227-0001). In addition, The 21-slot chassis requires that each of the following boards have higher revision levels: Explorer I Processor -- Revision level AC Explorer II Processor -- Revision level AG Each SIB card must be of the type that accepts an external NuBus clock (see 2.2.1); special SIB's are available (assembly no. 2236645-2) to fulfill this requirement. The procedure for modifying existing SIB boards is described in engineering memo AU05228701. 12.1.2 Disk Space* Each Lisp processor must have its own page and file band. Every file band must be set as a disk label default for proper identification by its processor. See Appendix A for a sample two-processor disk configuration. 12.2 Installation Procedure* The hardware and software for the 21-slot chassis is installed according to the procedure outlined in the 2Explorer LX System Installation* guide with several exceptions and additions outlined below. Boards are installed according to the slot assignments specified in Appendix B. 12.2.1 NuBus Clock/Terminator installation* Because of the increased fanout requirements of the 21-slot chassis NuBus, a special pair of NuBus terminators are installed on the rear of the back- plane to provide the necessary drive current for up to 16 NuBus cards. The "Active" terminator is plugged into the lowest slot of the top row of the backplane while the "Passive" terminator is plugged into the highest slot. Any boards that normally provide the NuBus clock for the chassis must be modified to accept this external NuBus clock (see 2.1.1). 12.2.2 Explorer Processor/Memory installation* Explorer Processors are installed as processor/memory board pairs to facilitate installation of independent local buses for each pair of boards. Since Explorer-I processor boards require extra space from the preceding slot, processors are inserted into NuBus slots that follow blank physical slots (e. g. 6,8,A,C,E). The associated memory board is then added to the N+1 slot (7,9,B,D,F), which establishes five possible slot pairs; 6-7, 8-9, A-B, C-D, E-F. Since slots A and B are reserved for extra SIB's (in the standard configuration), a total of four slot-pairs are allocated for Lisp processors. Each slot pair is fitted with an independent local bus. A local bus jumper card (TI part no. xxxxxxxx) is plugged across each slot pair along the second row of the rear of the backplane. Explorer II processors do not require the local bus. 2Configuration* 13.1 Configuration Partition* The configuration partition format used for Explorer LX machines is extended to cover the extra slots and processors found in the 21-slot chassis. The following exceptions and additions are observed when creating a 21-slot chassis configuration. 1) The "Boot Partition Name" fields of each Lisp configuration module must be explicitly specified (e.g. "MCR1"); microcode defaults ("*") will not work in the 21-slot chassis. 2) The slots-owned field for each Lisp processor must be carefully designed to avoid resource collision with other Lisp processors. Although the Nupi board can be shared by all processors, the SIB, memory, and Ethernet boards must each be assigned to only one processor. 3) The "RAM Base" must contain the NuBus address of that processor's memory board. For the processor in slot n, this address is typically #xFS000000 where slot S is equal to n+1 (see 2.2.2). The S1500 processor uses a RAM base of #xFFFFFFFF. 5) The file and page partitions allocated for each Lisp processor must be specified in the processor's configuration module. 13.1.1 Boot and Load Bands* Although one load and microcode are booted in the standard Explorer LX configuration, it is possible to specify a different load partition for each Lisp processor in the 21-slot chassis. For example, CPU 1 may own the Ethernet board, so it might run an Explorer LX band with TCP/IP and/or Decnet loaded while CPU's 2 and 3 run smaller non- networking load bands. When a mix of Explorer-I and Explorer-II boards is installed, MCR1 could contain the Explorer-I microcode while MCR2 is reserved for use by Explorer-II processors. These partition names are specified in the "Boot Partition" and "Load" fields of the configuration module (see examples in Appendix C). The configuration editing procedures outlined in the 2Explorer LX Installation Guide *apply to the modifying and restoring of 21-slot chassis configuration partitions. Note that the "Load Unit" field is expressed as a physical unit number while the "Boot Partition Unit" field is logical. 13.1.2 Network Resource Allocation* The NuBus Ethernet board cannot be shared by multiple Lisp processors; only one Lisp processor is allowed to contain the slot of this board in its slots-owned field. Should more than one Ethernet board be present in the chassis for use by specific Lisp processors, each Lisp processor owning an Ethernet board must boot from a different disk unit that has a different pack name from that of the other networked processors. This restriction is forced by the fact that no two network hosts on the same network can have the same name (even if their Ethernet addresses are different). Note that a given processor may own more than Ethernet board for gateway purposes. 13.1.3 File and Page band Allocation* Each Lisp configuration module contains at least six extra entries for specifying the file and page bands allocated for its processor. Note that the "# Module Entries" field in the module pointer must reflect the total number of entries in that configuration module. The following guidelines must be observed when specifying page and file bands in the configuration module: 1) Each file and page partition has a name that is unique to its particular unit and Nupi slot; each partition could have a name that identifies it's CPU - like "PAG1" or "FIL2". Multiple bands of the same type can be allocated for each processor. 2) Each entry contains one of the keywords "PAGE", "FILE", or "LOAD" within its label to identify the type of partition being described. If no mention of a given partition type can be found within the configuration module, each processor will treat all accessible partitions of that partition type as its own. 3) Every partition description normally has three entries in the configuration module, each with labels containing a partition type keyword and one of the "SLOT", "UNIT", or "NAME" keywords preceding a colon (which is followed by data). If any of these three entries are omitted, defaults are used. 4) The "UNIT" field is specified as a PHYSICAL unit number for load bands while LOGICAL unit numbers are required for file and page bands. Logical units are always expressed in decimal while Physical unit numbers are specified with six hexadecimal digits (including leading zeroes). See 3.2.2 for physical unit calculations. 5) If a given processor cannot access its configuration module, it will assume that it owns all partitions of its processor type (or generic types) on each available disk unit. In summary, each processor will feel free to access any partitions available unless specifically (and accurately) restricted otherwise. 23.2 Configuration Module Field Calculations* 13.2.1 Module Slots Calculation* The hex value of the "Module Slots" field can be calculated by entering: (SI:HEX (EXPT 2 n)) from a Lisp Listener, where "n" is the slot number of the processor; (SI:HEX (EXPT 2 6)) yields a value of #x40. 13.2.2 Physical Unit Calculation* You can calculate the physical value (in hex) of the "Load Unit" field by using the following: (SI:HEX (MULTIPLE-VALUE-BIND (FORMATTER UNIT) (TRUNCATE n 2) (DPB FORMATTER (BYTE 3 3) UNIT))) where "n" is the logical unit number of the load band. For logical unit 8, the physical unit is #x21. Remember to add leading zeroes -- #x21 appears as "000021" in the load unit field. 23.3* 2Sample 21-slot Chassis Configuration Module/Pointer* CPU 1 is installed in slot 6 and has a board type of 0 (Explorer I). The "Module Slots" field contains a hexadecimal representation of the location of the processor within the NuBus; "40" indicates that the CPU board is in slot 6 (see 3.2.1). The "# Module Entries" has been updated to indicate that we have added enough entries to bring the total to 12. The "Module Offset" points to the location of the configuration module within the the config partition. This number must be the same as the number in the "Configuration Module with Offset =" field of the configuration module. 1Module Pointer # (decimal) = <6>* 1Module Offset (decimal) = <6> blocks* 1Module Length (decimal) = <1> block* 1Boot Timeout (decimal) = <256> seconds* 1# Module Entries (decimal) = <12> entries* 1Board Type (hex) = <0>* 1Module Slots (hex) = <40>* 1Module Flags (hex) = <1>* CPU 1's memory is installed in slot 7. CPU 1 will boot "MCR1" on logical disk unit 0 from the NUPI board in slot 2. The load band in "LOD1" on physical unit 000000 will be loaded, while paging will take place on "PAG1" on logical unit 1. The "FIL1" file partition on logical unit 1 will then be booted by this processor if it is marked on unit 1's disk label as default: 1Configuration Module with Offset = <6> blocks* 1RAM Base* 1(hex) = * 1Boot Partition Slot (decimal) = <2>* 1Boot Partition Unit (decimal) = <0>* 1Boot Partition Name (text) = * 1Entry 0 (text) = <00002236412-0001CPU>* 1Entry 1 (text) = * 1Entry 2 (text) = * 1Entry 3 (text) = * 1Entry 4 (text) = * 1Entry 5 (text) = * 1Entry 6 (text) = * 1Entry 7 (text) = * 1Entry 8 (text) = * 1Entry 9 (text) = * 1Entry 10 (text) = * 1Entry 11 (text) = * You can have multiple configuration modules for the same slot to accomodate different CPU types. The examples in the appendix illustrate this flexibility for Explorer I and Explorer II (board type 5) CPU's. --------------------------------------------------------------------------------- 2APPENDIX A* 2 Disk Configuration for Two Lisp Processors* --------------------------------------------------------------------------------- 1Unit 0* Starting Name Partition type Block Length CPU/OS Type Comments * LABL (Volume Label) 0 2 (Generic) * PTBL (Partition table) 2 3 (Generic) SAVE (System Save Area) 5 3 (Generic) FMT (Format Parameters) 8 9 (Generic) TZON (Test Zone) 17 122 (Generic) BOOT (Microcode) 139 148 (Explorer) MENUBOOT 19 BOOT (Microcode) 287 300 (Explorer II) BOOT 35 GDOS (Microcode) 587 300 (Explorer) GDOS 025/87 Release 1.3.0 EXPT (Microcode) 887 300 (Explorer) EXPT 025/87 Release 1.3.0 DIAG (File Band) 1187 2048 (Explorer) DIAG 025/87 Release 1.3.0 * LOD1 (Load Band) 3235 30000 (Explorer) Explorer LX 2.0 * FIL2 (File Band) 33235 30000 (Explorer) CPU-2 File Band PAG2 (Page Band) 63235 42000 (Explorer) CPU-2 Page Area * MCR1 (Microcode) 105235 300 (Explorer) EXP1-UCODE-MP 12 MCR2 (Microcode) 105535 300 (Explorer II) EXP2-UCODE 27 MCR3 (Microcode) 105835 300 (Explorer) LOG (System Log) 106135 30 (Explorer) System Log METR (Meter Band) 106165 3635 (Explorer) END (Format Parameters) 109800 0 (Explorer) End of Disk 1Unit 1* Starting Name Partition type Block Length CPU/OS Type Comments * LABL (Volume Label) 0 2 (Generic) * PTBL (Partition table) 2 3 (Generic) SAVE (System Save Area) 5 3 (Generic) FMT (Format Parameters) 8 9 (Generic) TZON (Test Zone) 17 122 (Generic) BOOT (Microcode) 139 300 (Explorer) MENUBOOT 19 GDOS (Microcode) 439 300 (Explorer) GDOS 025/87 Release 1.3.0 DIAG (File Band) 739 2048 (Explorer) DIAG 025/87 Release 1.3.0 EXPT (Microcode) 2787 300 (Explorer) EXPT 025/87 Release 1.3.0 * FIL1 (File Band) 3087 30000 (Explorer) CPU-1 File Band PAG1 (Page Band) 33087 76613 (Explorer) CPU-1 Page Area END (Format Parameters) 109800 0 (Explorer) End of Disk 1Unit 4* Starting Name Partition type Block Length CPU/OS Type Comments * LABL (Volume Label) 0 2 (Generic) * PTBL (Partition table) 2 3 (Generic) SAVE (System Save Area) 5 3 (Generic) FMT (Format Parameters) 8 9 (Generic) TZON (Test Zone) 17 122 (Generic) DIAG (File Band) 139 2048 (System 5) DIAG 025/87 Release 1.3.0 GDOS (Load Band) 2187 300 (S1500) GDOS 025/87 Release 1.3.0 S15A (Load Band) 2487 150 (S1500) S15A 025/87 Release 1.3.0 GDCF (Configuration band) 2637 17 (Generic) GDCF 025/87 Release 1.3.0 EXCF (Configuration band) 2654 17 (Generic) EXCF 025/87 Release 1.3.0 GBUS (Configuration band) 2671 17 (Generic) GBUS 025/87 Release 1.3.0 * unx1 (Load Band) 2688 1024 (S1500) LX SYSTEM V 2.1.2 KERNEL unx2 (Load Band) 3712 1024 (S1500) unx3 (Load Band) 4736 1024 (S1500) cfg1 (Configuration band) 5760 17 (Generic) LX CONFIGURATION * cfg2 (Configuration band) 5777 17 (Generic) LX 21-SLOT CONFIGURATION cfg3 (Configuration band) 5794 17 (Generic) * root (File Band) 5811 12288 (System 5) LX ROOT FILE SYSTEM usr (File Band) 18099 32768 (System 5) LX USER FILE SYSTEM src (File Band) 50867 32000 (System 5) LX SOURCE FILE SYSTEM * swap (Page Band) 82867 26941 (S1500) --------------------------------------------------------------------------------- DAPPENDIX B* 321-Slot Chassis Slot Assignments* --------------------------------------------------------------------------------- 1Table B-1*;1 Standard Slot Assignments (up to four Lisp processors)*: Slot (Hex) Board Board Description ---------- ------------ -------------------------------------- 0 S1500-1 S1500 Processor Board 1 S1500-2 S1500 Processor Board (optional) 2 NUPI NUPI or MSC controller 3 ENET Ethernet Board (optional) 4 SIB-1 SIB for Lisp Processor 1 5 SIB-2 SIB for Lisp Processor 2 6 LISP-1 Lisp Processor 1 7 MEM-1 Memory board for LISP-1 8 LISP-2 Lisp Processor 2 9 MEM-2 Memory board for LISP-2 A SIB-3 SIB for Lisp Processor 3 (optional) B SIB-4 SIB for Lisp Processor 4 (optional) C LISP-3 Lisp Processor 3 (optional) D MEM-3 Memory board for LISP-3 (optional) E LISP-4 Lisp Processor 4 (optional) F MEM-4 Memory board for LISP-4 (optional) 1Table B-2; Alternate Configuration for Two Lisp Processors With Extra Memory:* Slot (Hex) Board Board Description ---------- ------------ -------------------------------------- 0 S1500-1 S1500 Processor Board 1 S1500-2 S1500 Processor Board (optional) 2 NUPI NUPI or MSC controller 3 ENET Ethernet Board (optional) 4 SIB-1 SIB for Lisp Processor 1 5 SIB-2 SIB for Lisp Processor 2 6 LISP-1 Lisp Processor 1 7 MEM-1A Memory board for LISP-1 8 MEM-1B Memory board for LISP-1 9 - Expansion for LISP-1 A - Expansion for LISP-1 B - Expansion for LISP-2 C LISP-2 Lisp Processor 2 D MEM-2A Memory board for LISP-2 E MEM-2B Memory board for LISP-2 F - Expansion for LISP-2 Note that this configuration will require a different configuration partition. --------------------------------------------------------------------------------- 2APPENDIX C 1 Standard Configuration Partition For up to Four Lisp Processors** 1(see table B-1).* This configuration can be used for 1, 2, 3, or 4 Lisp processors. Any combination of Explorer I or Explorer II cpu's may be used. CONFIGURATION PARTITION OVERHEAD FOR "cfg4" Title (text) = Generation (text) = <**> Revision (text) = <*A> --------------------------------------------------------------------------------- 2CONFIGURATION MODULE POINTERS* 1;; Module Pointer for S1500 Processors* Module Pointer # (decimal) = <0> Module Offset (decimal) = <1> block Module Length (decimal) = <2> blocks Boot Timeout (decimal) = <0> seconds # Module Entries (decimal) = <22> entries Board Type (hex) = <2> Module Slots (hex) = Module Flags (hex) = <1> 1;; Module Pointer for MSC controller* Module Pointer # (decimal) = <2> Module Offset (decimal) = <5> blocks Module Length (decimal) = <1> blocks Boot Timeout (decimal) = <0> seconds # Module Entries (decimal) = <1> entry Board Type (hex) = <1> Module Slots (hex) = Module Flags (hex) = <2> 1;; Module Pointer for EXP-I processor in slot 6* Module Pointer # (decimal) = <6> Module Offset (decimal) = <6> blocks Module Length (decimal) = <1> block Boot Timeout (decimal) = <256> seconds # Module Entries (decimal) = <12> entries Board Type (hex) = <0> Module Slots (hex) = <40> Module Flags (hex) = <1> 1;; Module Pointer for EXP-II processor in slot 6* Module Pointer # (decimal) = <7> Module Offset (decimal) = <7> blocks Module Length (decimal) = <1> block Boot Timeout (decimal) = <256> seconds # Module Entries (decimal) = <12> entries Board Type (hex) = <5> Module Slots (hex) = <40> Module Flags (hex) = <1> 1;; Module Pointer for EXP-I processor in slot 8* Module Pointer # (decimal) = <8> Module Offset (decimal) = <8> blocks Module Length (decimal) = <1> block Boot Timeout (decimal) = <256> seconds # Module Entries (decimal) = <12> entries Board Type (hex) = <0> Module Slots (hex) = <100> Module Flags (hex) = <1> 1;; Module Pointer for EXP-II processor in slot 8* Module Pointer # (decimal) = <9> Module Offset (decimal) = <9> blocks Module Length (decimal) = <1> block Boot Timeout (decimal) = <256> seconds # Module Entries (decimal) = <12> entries Board Type (hex) = <5> Module Slots (hex) = <100> Module Flags (hex) = <1> 1;; Module Pointer for EXP-I processor in slot C* Module Pointer # (decimal) = <12> Module Offset (decimal) = <10> blocks Module Length (decimal) = <1> block Boot Timeout (decimal) = <256> seconds # Module Entries (decimal) = <12> entries Board Type (hex) = <0> Module Slots (hex) = <1000> Module Flags (hex) = <1> 1;; Module Pointer for EXP-II processor in slot C* Module Pointer # (decimal) = <13> Module Offset (decimal) = <11> blocks Module Length (decimal) = <1> block Boot Timeout (decimal) = <256> seconds # Module Entries (decimal) = <12> entries Board Type (hex) = <5> Module Slots (hex) = <1000> Module Flags (hex) = <1> 1;; Module Pointer for EXP-I processor in slot E* Module Pointer # (decimal) = <14> Module Offset (decimal) = <12> blocks Module Length (decimal) = <1> block Boot Timeout (decimal) = <256> seconds # Module Entries (decimal) = <12> entries Board Type (hex) = <0> Module Slots (hex) = <4000> Module Flags (hex) = <1> 1;; Module Pointer for EXP-II processor in slot E* Module Pointer # (decimal) = <15> Module Offset (decimal) = <13> blocks Module Length (decimal) = <1> block Boot Timeout (decimal) = <256> seconds # Module Entries (decimal) = <12> entries Board Type (hex) = <5> Module Slots (hex) = <4000> Module Flags (hex) = <1> --------------------------------------------------------------------------------- 2CONFIGURATION MODULES* 1;; Configuration Module for S1500 Processor(s)* Configuration Module with Offset = <1> block RAM Base (hex) = Boot Partition Slot (decimal) = <255> Boot Partition Unit (decimal) = <0> Boot Partition Name (text) = <*> Entry 0 (text) = <00002535860-0001CPU> Entry 1 (text) = Entry 2 (text) = Entry 3 (text) = Entry 4 (text) = Entry 5 (text) = Entry 6 (text) = Entry 7 (text) = Entry 8 (text) = Entry 9 (text) = Entry 10 (text) = Entry 11 (text) = Entry 12 (text) = Entry 13 (text) = Entry 14 (text) = Entry 15 (text) = Entry 16 (text) = Entry 17 (text) = Entry 18 (text) = Entry 19 (text) = Entry 20 (text) = Entry 21 (text) = 1;; Configuration Module for MSC Controller* Configuration Module with Offset = <5> blocks RAM Base (hex) = Boot Partition Slot (decimal) = <255> Boot Partition Unit (decimal) = <4> Boot Partition Name (text) = <*> Entry 0 (text) = <00002537780-0001MSC> --------------------------------------------------------------------------------- 2;; CPU-1* 1;; Configuration Module for EXP-I processor in slot 6* Configuration Module with Offset = <6> blocks RAM Base (hex) = Boot Partition Slot (decimal) = <2> Boot Partition Unit (decimal) = <0> Boot Partition Name (text) = Entry 0 (text) = <00002236412-0001CPU> Entry 1 (text) = Entry 2 (text) = Entry 3 (text) = Entry 4 (text) = Entry 5 (text) = Entry 6 (text) = Entry 7 (text) = Entry 8 (text) = Entry 9 (text) = Entry 10 (text) = Entry 11 (text) = 1;; Configuration Module for EXP-II processor in slot 6* Configuration Module with Offset = <7> blocks RAM Base (hex) = Boot Partition Slot (decimal) = <2> Boot Partition Unit (decimal) = <0> Boot Partition Name (text) = Entry 0 (text) = <00002540830-0001CPU> Entry 1 (text) = Entry 2 (text) = Entry 3 (text) = Entry 4 (text) = Entry 5 (text) = Entry 6 (text) = Entry 7 (text) = Entry 8 (text) = Entry 9 (text) = Entry 10 (text) = Entry 11 (text) = --------------------------------------------------------------------------------- 2;; CPU-2* 1;; Configuration Module for EXP-I processor in slot 8* Configuration Module with Offset = <8> blocks RAM Base (hex) = Boot Partition Slot (decimal) = <2> Boot Partition Unit (decimal) = <0> Boot Partition Name (text) = Entry 0 (text) = <00002236412-0001CPU> Entry 1 (text) = Entry 2 (text) = Entry 3 (text) = Entry 4 (text) = Entry 5 (text) = Entry 6 (text) = Entry 7 (text) = Entry 8 (text) = Entry 9 (text) = Entry 10 (text) = Entry 11 (text) = 1;; Configuration Module for EXP-II processor in slot 8* Configuration Module with Offset = <9> blocks RAM Base (hex) = Boot Partition Slot (decimal) = <2> Boot Partition Unit (decimal) = <0> Boot Partition Name (text) = Entry 0 (text) = <00002540830-0001CPU> Entry 1 (text) = Entry 2 (text) = Entry 3 (text) = Entry 4 (text) = Entry 5 (text) = Entry 6 (text) = Entry 7 (text) = Entry 8 (text) = Entry 9 (text) = Entry 10 (text) = Entry 11 (text) = --------------------------------------------------------------------------------- 2;; CPU-3* 1;; Configuration Module for EXP-I processor in slot C* Configuration Module with Offset = <10> blocks RAM Base (hex) = Boot Partition Slot (decimal) = <2> Boot Partition Unit (decimal) = <0> Boot Partition Name (text) = Entry 0 (text) = <00002236412-0001CPU> Entry 1 (text) = Entry 2 (text) = Entry 3 (text) = Entry 4 (text) = Entry 5 (text) = Entry 6 (text) = Entry 7 (text) = Entry 8 (text) = Entry 9 (text) = Entry 10 (text) = Entry 11 (text) = 1;; Configuration Module for EXP-II processor in slot C* Configuration Module with Offset = <11> blocks RAM Base (hex) = Boot Partition Slot (decimal) = <2> Boot Partition Unit (decimal) = <0> Boot Partition Name (text) = Entry 0 (text) = <00002540830-0001CPU> Entry 1 (text) = Entry 2 (text) = Entry 3 (text) = Entry 4 (text) = Entry 5 (text) = Entry 6 (text) = Entry 7 (text) = Entry 8 (text) = Entry 9 (text) = Entry 10 (text) = Entry 11 (text) = --------------------------------------------------------------------------------- 2;; CPU-4* 1;; Configuration Module for EXP-I processor in slot E* Configuration Module with Offset = <12> blocks RAM Base (hex) = Boot Partition Slot (decimal) = <2> Boot Partition Unit (decimal) = <0> Boot Partition Name (text) = Entry 0 (text) = <00002236412-0001CPU> Entry 1 (text) = Entry 2 (text) = Entry 3 (text) = Entry 4 (text) = Entry 5 (text) = Entry 6 (text) = Entry 7 (text) = Entry 8 (text) = Entry 9 (text) = Entry 10 (text) = Entry 11 (text) = 1;; Configuration Module for EXP-II processor in slot E* Configuration Module with Offset = <13> blocks RAM Base (hex) = Boot Partition Slot (decimal) = <2> Boot Partition Unit (decimal) = <0> Boot Partition Name (text) = Entry 0 (text) = <00002540830-0001CPU> Entry 1 (text) = Entry 2 (text) = Entry 3 (text) = Entry 4 (text) = Entry 5 (text) = Entry 6 (text) = Entry 7 (text) = Entry 8 (text) = Entry 9 (text) = Entry 10 (text) = Entry 11 (text) =